Key Directions and a Roadmap for Electrical Design for Manufacturability
A. B. Kahng, Proc. European Solid-State Circuits Conf., 2007
Detailed Placement for Leakage Reduction using Systematic Through-Pitch Variation
A. B. Kahng, S. Muddu and P. Sharma, Proc. International Symposium on Low Power Electronics and Design, 2007
On-Line Adjustable Buffering for Runtime Power Reduction
A. B. Kahng, S. Reda and P. Sharma, Proc. International Symposium on Quality Electronic Design, March 2007
A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances
A. B. Kahng and R. O. Topaloglu, Proc. International Symposium on Quality Electronic Design, March 2007, March 2007 (Best Paper award)
A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield
J. Hu, A. B. Kahng, B. Liu, G. Venkataraman and X. Xu, Proc. Asia and South Pacific Design Automation Conf., January 2007
Fill for Shallow Trench Isolation CMP
A. B. Kahng and R. O. Topaloglu, Proc. ACM/IEEE Intl. Conf. on Computer-Aided Design, November 2006
Interconnect Matching Design Rule Inferring and Optimization through Correlation Extraction
A. B. Kahng and R. O. Topaloglu, Proc. International Conference of Computer Design, October 2006
A Procedure and Program to Calculate Shuttle Mask Advantage
A. Balasinski, A. B. Kahng, W. Sachs-Baker and X. Xu, Proc. 27th BACUS Symposium on Photomask Technology and Management, 2006
A General Framework for Multi-Flow, Multi-Layer, Multi-Project Reticles Design
A. B. Kahng and X. Xu, Proc. 27th BACUS Symposium on Photomask Technology and Management, 2006
Fast Dual-Graph Based Hot-Spot Detection
A. B. Kahng, C.-H. Park and X. Xu, Proc. 27th BACUS Symposium on Photomask Technology and Management, 2006
Auxiliary Pattern for Cell-Based OPC
A. B. Kahng and C.-H. Park, Proc. 27th BACUS Symposium on Photomask Technology and Management, 2006
Timing-Driven Steiner Trees are (Practically) Free
C. J. Alpert, A. B. Kahng, C. N. Sze and Q. Wang, Proc. ACM/IEEE Design Automation Conference, July 2006
Statistical Gate
Delay Calculation with Crosstalk Alignment Consideration
A. B. Kahng, B. Liu and X. Xu, Proc. ACM/IEEE GLSVLSI, April 2006
Fast Yield-Driven
Fracture for Variable Shaped-Beam Mask Writing
A. B. Kahng, X. Xu and A. Zelikovsky, Photomask
and Next-Generation Lithography Mask Technology XI, April 2006
Impact of
Gate-Length Biasing on Threshold-Voltage Selection
A. B. Kahng, S. Muddu and P. Sharma, International Symposium
on Quality Electronic Design, April 2006
Study of Floating
Fill Impact on Interconnect Capacitance
A. B. Kahng, K. Samadi and P. Sharma, International Symposium
on Quality Electronic Design, April 2006
Lens
Aberration-Aware Timing-Driven Placement
A. B. Kahng, C.-H. Park, P. Sharma and Q. Wang, Proc. Design Automation
and Testing in Europe, March 2006
Lithography
Simulation-Based Full-chip Design Analyses
P. Gupta, A. B. Kahng and P. Sharma, Proc. SPIE Conference
on Design and Process Integration for Microelectronic Manufacturing, March 2006
Modeling of Non-Uniform Device Geometries for Post-Lithography Circuit Analysis
P. Gupta, A. B. Kahng, Y. Kim, S. Shah and D. Sylvester, Proc. SPIE Conference
on Design and Process Integration for Microelectronic Manufacturing, March 2006
Modeling edge placement error distribution in standard cell library
P. Gupta, A. B. Kahng, S. Muddu and S. Nakagawa, Proc. SPIE Conference
on Design and Process Integration for Microelectronic Manufacturing, March 2006
Closing the
Loop in Interconnect Analyses and Optimization: CMP Fill, Lithography and Timing
P. Gupta, A. B. Kahng, O.S. Nakagawa and K. Samadi, Proc. 22nd Intl. VLSI/ULSI Multilevel
Interconnection (VMIC) Conf., October 2005
Yield-Driven
Multi-Project Reticle Design and Wafer Dicing
A. B. Kahng, I. I. Mandoiu, X. Xu, and A. Zelikovsky, Proc.
25th BACUS Symposium on Photomask Technology and Management, October 2005
Modeling OPC
Complexity for Design for Manufacturability
P. Gupta, A. B. Kahng, S. Muddu, S. Nakagawa and C.-H. Park, Proc.
25th BACUS Symposium on Photomask Technology and Management, October 2005
Enhanced Resist
and Etch CD Control by Design Perturbation
P. Gupta, A. B. Kahng and C.-H. Park, Proc. 25th BACUS Symposium
on Photomask Technology and Management, October 2005
Defocus-Aware Leakage Estimation and Control
A. B. Kahng, S. Muddu and P. Sharma, Proceedings of the 2005 International
Symposium on Low Power Electronics and Design, August 2005
Self-Compensating
Design for Focus Variation
P. Gupta, A. B. Kahng, Y. Kim, and D. Sylvester, Proc. Design Automation
Conference, June 2005
Improving OPC
Quality Via Interactions Within the Design-to-Manufacturing Flow
P. Gupta, A. B. Kahng and C.-H. Park, Photomask
and Next-Generation Lithography Mask Technology X, April 2005
Simultaneous Buffer
Insertion and Wire Sizing Considering Systematic CMP Variation and Random Leff Variation
L. He, A. B. Kahng, K. Tam and J. Xiong, Proc. International Symposium
on Physical Design, April 2005
Design of IC
Interconnects with Accurate Modeling of CMP
L. He, A. B. Kahng, K. Tam and J. Xiong, International Society
for Optical Engineering (SPIE) Symposium on Microlithography,
March 2005
Performance-Driven
OPC for Mask Cost Reduction
P. Gupta, A.B. Kahng, D. Sylvester and J. Yang, Proc. IEEE International
Symposium on Quality Electronic Design, March 2005
A Practical
Transistor-Level Threshold Voltage Assignment Methodology
P. Gupta, A. B. Kahng and P. Sharma, Proc.
IEEE International Symposium on Quality Electronic Design, March 2005
Manufacturing-Aware
Design Methodology for Assist Feature Correctness
P. Gupta, A. B. Kahng and C.-H. Park, Proc.
SPIE Conf. on Design and Process Integration for Microelectronic
Manufacturing, Feb. 2005
Detailed Placement
for Improved Depth of Focus and CD Control
P. Gupta, A. B. Kahng and C.-H. Park, Proc. Asia and South
Pacific Design Automation Conf., Jan. 2005
Evaluation of the
New OASIS Format for Layout Fill Compression
Y. Chen, A. B. Kahng, G. Robins, A. Zelikovsky, and Y. Zheng, Proc.
11th IEEE Intl. Conf. on Electronics, Circuits and Systems,
December 2004
Reticle
Floorplanning With Guaranteed Yield for Multi-Project Wafers
A. B. Kahng, and S. Reda, Proc. ACM/IEEE Intl.
Conf. on Computer Design, October 2004
Variability-Driven
Considerations in the Design of Integrated-Circuit Global Interconnects
L. He, A. B. Kahng, K. H. Tam and J. Xiong, Proc. 21th Intl. VLSI Multilevel Interconnection (VMIC)
Conf., September 2004
Joining the Design
and Mask Flows for Better and Cheaper Masks
P. Gupta, A. B. Kahng, C.-H. Park, P. Sharma, D. Sylvester
and J. Yang, Proc. 24th BACUS Symposium on Photomask Technology
and Management, September 2004
Yield- and
Cost-Driven Fracturing for Variable Shaped-Beam Mask Writing
A. B. Kahng, X. Xu and A. Zelikovsky, Proc. 24th BACUS Symposium on Photomask Technology and Management,
September 2004
Toward a
Methodology for Manufacturability Driven Design Rule Exploration
L. Capodieci, P. Gupta, A. B. Kahng, D. Sylvester and J. Yang, Proc.ACM/IEEE Design Automation Conf.,
June 2004
Selective
Gate-Length Biasing for Cost-Effective Runtime Leakage Control
P. Gupta, A. B. Kahng, P. Sharma and D. Sylvester, Proc.ACM/IEEE Design Automation Conf., June 2004
Manufacturing-Aware
Physical Design
P. Gupta and A. B. Kahng, Proc. IEEE/ACM Intl. Conference on Computer-Aided
Design, November 2003
A Cost-Driven
Lithographic Correction Methodology Based on Off-the-Shelf Sizing Tools
P. Gupta, A. B. Kahng, D. Sylvester and J. Yang, Proc. ACM/IEEE Design Automation Conf.,
June 2003
Performance-Impact
Limited Area Fill Synthesis
Y. Chen, P. Gupta and A. B. Kahng, Proc. ACM/IEEE Design Automation Conf., June 2003
Resist Heating
Dependence on Subfield Scheduling in 50kV Electron Beam Maskmaking
S. V. Babin, A. B. Kahng, I. I. Mandoiu, and S. Muddu, Photomask and Next-Generation Lithography
Mask Technology X, Proc. SPIE #5130, April 2003
Data Volume
Reduction in Dummy Fill Generation
Y. Chen, A. B. Kahng, G. Robins, A. Zelikovsky, and Y. H. Zheng, Proc.
Design Automation and Testing in Europe, March 2003
Subfield
Scheduling for Throughput Maximization in Electron-Beam Photomask Fabrication
S. V. Babin, A. B. Kahng, I. I. Mandoiu, and S. Muddu, Emerging Lithographic
Technologies VII, R. L. Engelstad (ed.), Proc. SPIE #5037, Feb. 2003
Toward
Performance-Driven Reduction of the Cost of RET-Based Lithography Control
D. Sylvester, P. Gupta, A. B. Kahng, and J. Yang, Proc. SPIE Conf. on Design and Process Integration
for Microelectronic Manufacturing, Feb. 2003
Performance-Impact
Limited Dummy Fill Insertion
Y. Chen, P. Gupta, and A. B. Kahng, Proc. SPIE Conf. on Design
and Process Integration for Microelectronic Manufacturing, Feb. 2003
Compression
Algorithms for "Dummy Fill" VLSI Layout Data
A. B. Kahng, R. Ellis, and Y. Zheng, Proc. SPIE Conf. on Design
and Process Integration for Microelectronic Manufacturing, Feb. 2003
Non-Tree Routing
for Reliability and Yield Improvement
A. B. Kahng, B. Liu, and I. I. Mandoiu, Proc. IEEE/ACM Intl.
Conference on Computer-Aided Design, November 2002
Design
Sensitivities to Variability: Extrapolation and Assessments in Nanometer VLSI
Y. Cao, P. Gupta, A. B. Kahng, D. Sylvester and J. Yang, IEEE ASIC/SoC Conference, September 2002
A Roadmap and Vision for Physical Design
A. B. Kahng, Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2002
Closing the
Smoothness and Uniformity Gap in Area Fill Synthesis
Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, Proc. ACM/IEEE
Intl. Symp. on Physical Design, April 2002
Design-Process Integration and Shared Red Bricks
A. B. Kahng, SPIE Conference on Design and Process Integration for Microelectronic Manufacturing,
Santa Clara, March 2002
Monte-Carlo
Methods for Chemical-Mechanical Planarization on Multiple-Layer and Dual-Material Models
Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, SPIE Conference on
Design and Process Integration for Microelectronic Manufacturing, March 2002
Hierarchical
Dummy Fill for Process Uniformity
Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, Proc. Asia
and South Pacific Design Automation Conf., Jan. 2001
Practical
Iterated Fill Synthesis for CMP Uniformity
Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, Proc. ACM/IEEE Design Automation Conf., June 2000
Monte-Carlo
Algorithms for Layout Density Control
Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, Proc. Asia
and South Pacific Design Automation Conf., Jan. 2000
The T-Join
Problem in Sparse Graphs: Applications to Phase Assignment Problem in VLSI Mask Layout
P.Berman, A. B. Kahng, D. Vidhani and A. Zelikovsky, Workshop on Algorithms
and Data Structures (WADS), LNCS(vol. 1663), August 1999
Subwavelength
Lithography and its Potential Impact on Design and EDA
A. B. Kahng and Y. C. Pati, Proc. ACM/IEEE Design Automation Conf., June 1999
Subwavelength
Optical Lithography: Challenges and Impact on Physical Design
A. B. Kahng and Y. C. Pati, Proc. ACM Intl. Symp. on Physical Design, April 1999
Optimal Phase
Conflict Removal for Layout of Dark Field Alternating Phase Shifting Masks
P. Berman, A. B. Kahng, D. Vidhani, H. Wang and A. Zelikovsky, Proc.
ACM Intl. Symp. on Physical Design, April 1999
New Multilevel
and Hierarchical Algorithms for Layout Density Control
A. B. Kahng, G. Robins, A. Singh and A. Zelikovsky, Proc.
Asia and South Pacific Design Automation Conf., Jan. 1999
New and Exact
Filling Algorithms for Layout Density Control
A. B. Kahng, G. Robins, A. Singh and A. Zelikovsky, Proc. IEEE
Intl. Conf. on VLSI Design, Jan. 1999
IC Layout and Manufacturability: Critical
Links and Design Flow Implications
A. B. Kahng, Proc. IEEE Intl. Conf. on VLSI Design, Jan. 1999
Filling and
Slotting: Analysis and Algorithms
A. B. Kahng, G. Robins, A. Singh, H. Wang and A. Zelikovsky, Proc.
ACM/IEEE Intl. Symp. on Physical Design, April 1998
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